In interfacing between the analog and digital world, the analog-to-digital (A/D) converter is a vitally important device. The A/D converter converts an analog signal such as a voltage or a current into a digital signal, which can be further processed, stored, and disseminated using digital computers. For example, A/D converters are used in communications, appliances, signal processing, computers, and any other fields that require conversion of analog signals into digital forms.
The A/D converter encodes an analog input signal into a digital output signal of a predetermined bit length, n. The encoding of the analog input voltage, V.sub.A, into a digital output signal of n-bits is typically approximated as a binary fraction of a full-scale output voltage, V.sub.FS. Hence, the output of the converter corresponds to an N-bit digital word D given as: EQU D=V.sub.A /V.sub.FS =(b.sub.1 /2.sup.1)+(b.sub.2 /2.sup.2)+. . . +(b.sub.n /2.sup.n),
where b.sub.1, b.sub.2, . . . , b.sub.n are the binary bit coefficients having a value of either a 1 or 0. The binary coefficient b.sub.1 represents the most significant bit while b.sub.n represents the least significant bit. The binary bit coefficients are obtained from the output of the A/D converter.
When an A/D converter generates digital data or the binary bit coefficients at its output simultaneously and in parallel, it is generally referred to as a flash or parallel A/D converter. Prior Art FIG. 1 illustrates a circuit diagram of a conventional n-bit flash A/D converter 100. The flash A/D converter 100 is comprised of a plurality of resistors, a plurality of comparators, and an encoding logic circuit. The resistors form a resistor network and are coupled in series between two potential voltages: a reference voltage, Vref, and a ground. In this resistor network, a set of reference voltages are generated at the nodes between the series coupled resistors. Each of these reference voltages are then fed into a comparator.
The flash A/D converter of Prior Art FIG. 1 also includes (2.sup.n -1) comparators. Each comparator receives two inputs: a reference voltage described above and an analog input signal, V.sub.A. The comparator compares the two input signals and generates an output signal consisting of two signals: V1 and V2. Typically, these are digital signals represent a value of "1" and "0," and are equivalent to the binary bit coefficients described above. Taken together, the comparators generate 2.sup.n -1 digital signals, which are then encoded into an n-bit digital signal by an encoding logic circuit. In this manner, an analog signal is transformed into an n-bit digital signal, comprised of bits b.sub.1 (i.e., the most significant bit) through b.sub.n (i.e., the least significant bit).
One of the main advantages of the conventional flash A/D converter is its speed. In particular, by using a separate comparator with a fixed reference for every quantization level in a digital word, from zero to full scale, the conventional flash A/D converter provides conversion of analog signals into digital format in a single step. Due to this reason, the flash A/D converter has been widely implemented in an integrated chip (IC).
Unfortunately, the conventional flash A/D converters are costly and inefficient to implement in an integrated chip (IC). First, the conventional n-bit full flash A/D converter requires (2.sup.n -1) comparators. For example, a 4-bit flash A/D converter would require 15 comparators and an 8-bit flash A/D converter would need 255 comparators. Hence, the circuit complexity increases very rapidly as the number of bits are increased. In addition, the large number of comparators needed to produce an n-bit digital code are very expensive to implement in an IC. Second, comparators are typically implemented in the industry using operational amplifiers (op amps), which are more generally more expensive and bulkier to implement than other devices in an IC. Third, the traditional flash A/D converters generally incorporate an encoder logic circuit to encode the analog signal into digital format. This encoder circuitry adds additional cost and size to implement in an IC.
Thus, what is needed is an A/D converter that can be efficiently implemented with attendant savings in cost, space, and power consumption. The present invention satisfies these needs by providing a pseudo-flash A/D converter utilizing multiplexers and/or decoders in place of majority of the comparators.